Revision: 1233
http://www.exim.org/viewvc/pcre2?view=rev&revision=1233
Author: zherczeg
Date: 2020-03-02 08:52:01 +0000 (Mon, 02 Mar 2020)
Log Message:
-----------
Improve memory clearing in JIT.
Modified Paths:
--------------
code/trunk/src/pcre2_jit_compile.c
code/trunk/src/sljit/sljitLir.h
code/trunk/src/sljit/sljitNativeMIPS_common.c
code/trunk/src/sljit/sljitNativePPC_common.c
code/trunk/src/sljit/sljitNativeSPARC_common.c
code/trunk/src/sljit/sljitNativeX86_common.c
Modified: code/trunk/src/pcre2_jit_compile.c
===================================================================
--- code/trunk/src/pcre2_jit_compile.c 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/pcre2_jit_compile.c 2020-03-02 08:52:01 UTC (rev 1233)
@@ -3048,13 +3048,50 @@
static SLJIT_INLINE void reset_fast_fail(compiler_common *common)
{
DEFINE_COMPILER;
+sljit_s32 size = common->fast_fail_end_ptr - common->fast_fail_start_ptr;
+sljit_s32 src = SLJIT_IMM;
sljit_s32 i;
+struct sljit_label *loop;
SLJIT_ASSERT(common->fast_fail_start_ptr < common->fast_fail_end_ptr);
-OP2(SLJIT_SUB, TMP1, 0, STR_PTR, 0, SLJIT_IMM, IN_UCHARS(1));
-for (i = common->fast_fail_start_ptr; i < common->fast_fail_end_ptr; i += sizeof(sljit_sw))
- OP1(SLJIT_MOV, SLJIT_MEM1(SLJIT_SP), i, TMP1, 0);
+if (size == sizeof(sljit_sw))
+ {
+ OP1(SLJIT_MOV, SLJIT_MEM1(SLJIT_SP), common->fast_fail_start_ptr, SLJIT_IMM, 0);
+ return;
+ }
+
+if (sljit_get_register_index(TMP3) >= 0 && !sljit_has_cpu_feature(SLJIT_HAS_ZERO_REGISTER))
+ {
+ OP1(SLJIT_MOV, TMP3, 0, SLJIT_IMM, 0);
+ src = TMP3;
+ }
+
+if (size <= 6 * sizeof(sljit_sw))
+ {
+ for (i = common->fast_fail_start_ptr; i < common->fast_fail_end_ptr; i += sizeof(sljit_sw))
+ OP1(SLJIT_MOV, SLJIT_MEM1(SLJIT_SP), i, src, 0);
+ return;
+ }
+
+GET_LOCAL_BASE(TMP1, 0, common->fast_fail_start_ptr);
+
+i = ((size / (sljit_s32)sizeof(sljit_sw)) % 3) * sizeof(sljit_sw);
+
+OP2(SLJIT_ADD, TMP2, 0, TMP1, 0, SLJIT_IMM, size - i);
+
+loop = LABEL();
+OP1(SLJIT_MOV, SLJIT_MEM1(TMP1), 0, src, 0);
+OP2(SLJIT_ADD, TMP1, 0, TMP1, 0, SLJIT_IMM, 3 * sizeof(sljit_sw));
+OP1(SLJIT_MOV, SLJIT_MEM1(TMP1), -2 * (sljit_sw)sizeof(sljit_sw), src, 0);
+OP1(SLJIT_MOV, SLJIT_MEM1(TMP1), -1 * (sljit_sw)sizeof(sljit_sw), src, 0);
+CMPTO(SLJIT_LESS, TMP1, 0, TMP2, 0, loop);
+
+if (i >= (sljit_sw)sizeof(sljit_sw))
+ OP1(SLJIT_MOV, SLJIT_MEM1(TMP1), 0, src, 0);
+
+if (i >= 2 * (sljit_sw)sizeof(sljit_sw))
+ OP1(SLJIT_MOV, SLJIT_MEM1(TMP1), sizeof(sljit_sw), src, 0);
}
static SLJIT_INLINE void do_reset_match(compiler_common *common, int length)
Modified: code/trunk/src/sljit/sljitLir.h
===================================================================
--- code/trunk/src/sljit/sljitLir.h 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/sljit/sljitLir.h 2020-03-02 08:52:01 UTC (rev 1233)
@@ -571,12 +571,14 @@
#define SLJIT_HAS_FPU 0
/* [Limitation] Some registers are virtual registers. */
#define SLJIT_HAS_VIRTUAL_REGISTERS 1
+/* [Emulated] Has zero register (setting a memory location to zero is efficient). */
+#define SLJIT_HAS_ZERO_REGISTER 2
/* [Emulated] Count leading zero is supported. */
-#define SLJIT_HAS_CLZ 2
+#define SLJIT_HAS_CLZ 3
/* [Emulated] Conditional move is supported. */
-#define SLJIT_HAS_CMOV 3
+#define SLJIT_HAS_CMOV 4
/* [Emulated] Conditional move is supported. */
-#define SLJIT_HAS_PREFETCH 4
+#define SLJIT_HAS_PREFETCH 5
#if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86)
/* [Not emulated] SSE2 support is available on x86. */
Modified: code/trunk/src/sljit/sljitNativeMIPS_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativeMIPS_common.c 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/sljit/sljitNativeMIPS_common.c 2020-03-02 08:52:01 UTC (rev 1233)
@@ -684,6 +684,8 @@
#else
#error "FIR check is not implemented for this architecture"
#endif
+ case SLJIT_HAS_ZERO_REGISTER:
+ return 1;
#if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
case SLJIT_HAS_CLZ:
Modified: code/trunk/src/sljit/sljitNativePPC_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativePPC_common.c 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/sljit/sljitNativePPC_common.c 2020-03-02 08:52:01 UTC (rev 1233)
@@ -626,6 +626,8 @@
return 1;
#endif
+ /* A saved register is set to a zero value. */
+ case SLJIT_HAS_ZERO_REGISTER:
case SLJIT_HAS_CLZ:
case SLJIT_HAS_PREFETCH:
return 1;
Modified: code/trunk/src/sljit/sljitNativeSPARC_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativeSPARC_common.c 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/sljit/sljitNativeSPARC_common.c 2020-03-02 08:52:01 UTC (rev 1233)
@@ -451,6 +451,9 @@
return 1;
#endif
+ case SLJIT_HAS_ZERO_REGISTER:
+ return 1;
+
#if (defined SLJIT_CONFIG_SPARC_64 && SLJIT_CONFIG_SPARC_64)
case SLJIT_HAS_CMOV:
return 1;
Modified: code/trunk/src/sljit/sljitNativeX86_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativeX86_common.c 2020-02-27 08:35:14 UTC (rev 1232)
+++ code/trunk/src/sljit/sljitNativeX86_common.c 2020-03-02 08:52:01 UTC (rev 1233)
@@ -2316,6 +2316,10 @@
if (!HAS_FLAGS(op)) {
if ((src2 & SLJIT_IMM) && emit_lea_binary(compiler, dst, dstw, src1, src1w, SLJIT_IMM, -src2w) != SLJIT_ERR_UNSUPPORTED)
return compiler->error;
+ if (SLOW_IS_REG(dst) && src2 == dst) {
+ FAIL_IF(emit_non_cum_binary(compiler, BINARY_OPCODE(SUB), dst, 0, dst, 0, src1, src1w));
+ return emit_unary(compiler, NEG_rm, dst, 0, dst, 0);
+ }
}
if (dst == SLJIT_UNUSED)
