[Pcre-svn] [1057] code/trunk/src/sljit: JIT compiler update.

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Oggetto: [Pcre-svn] [1057] code/trunk/src/sljit: JIT compiler update.
Revision: 1057
          http://www.exim.org/viewvc/pcre2?view=rev&revision=1057
Author:   zherczeg
Date:     2019-01-03 09:34:42 +0000 (Thu, 03 Jan 2019)
Log Message:
-----------
JIT compiler update.


Modified Paths:
--------------
    code/trunk/src/sljit/sljitConfigInternal.h
    code/trunk/src/sljit/sljitNativeARM_64.c
    code/trunk/src/sljit/sljitNativePPC_common.c


Modified: code/trunk/src/sljit/sljitConfigInternal.h
===================================================================
--- code/trunk/src/sljit/sljitConfigInternal.h    2018-12-14 16:10:57 UTC (rev 1056)
+++ code/trunk/src/sljit/sljitConfigInternal.h    2019-01-03 09:34:42 UTC (rev 1057)
@@ -530,7 +530,7 @@
 #endif /* !SLJIT_FUNC */


 #ifndef SLJIT_INDIRECT_CALL
-#if ((defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64) && (defined SLJIT_BIG_ENDIAN && SLJIT_BIG_ENDIAN)) \
+#if ((defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64) && (!defined _CALL_ELF || _CALL_ELF == 1)) \
     || ((defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) && defined _AIX)
 /* It seems certain ppc compilers use an indirect addressing for functions
    which makes things complicated. */


Modified: code/trunk/src/sljit/sljitNativeARM_64.c
===================================================================
--- code/trunk/src/sljit/sljitNativeARM_64.c    2018-12-14 16:10:57 UTC (rev 1056)
+++ code/trunk/src/sljit/sljitNativeARM_64.c    2019-01-03 09:34:42 UTC (rev 1057)
@@ -51,7 +51,7 @@
     0, 0, 1, 2, 3, 4, 5, 6, 7
 };


-#define W_OP (1 << 31)
+#define W_OP (1u << 31)
 #define RD(rd) (reg_map[rd])
 #define RT(rt) (reg_map[rt])
 #define RN(rn) (reg_map[rn] << 5)
@@ -560,7 +560,7 @@
     /* dst must be register, TMP_REG1
        arg1 must be register, TMP_REG1, imm
        arg2 must be register, TMP_REG2, imm */
-    sljit_ins inv_bits = (flags & INT_OP) ? (1 << 31) : 0;
+    sljit_ins inv_bits = (flags & INT_OP) ? W_OP : 0;
     sljit_ins inst_bits;
     sljit_s32 op = (flags & 0xffff);
     sljit_s32 reg;
@@ -710,7 +710,7 @@
         return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2));
     case SLJIT_MOV_U8:
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
-        return push_inst(compiler, (UBFM ^ (1 << 31)) | RD(dst) | RN(arg2) | (7 << 10));
+        return push_inst(compiler, (UBFM ^ W_OP) | RD(dst) | RN(arg2) | (7 << 10));
     case SLJIT_MOV_S8:
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
         if (!(flags & INT_OP))
@@ -718,7 +718,7 @@
         return push_inst(compiler, (SBFM ^ inv_bits) | RD(dst) | RN(arg2) | (7 << 10));
     case SLJIT_MOV_U16:
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
-        return push_inst(compiler, (UBFM ^ (1 << 31)) | RD(dst) | RN(arg2) | (15 << 10));
+        return push_inst(compiler, (UBFM ^ W_OP) | RD(dst) | RN(arg2) | (15 << 10));
     case SLJIT_MOV_S16:
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
         if (!(flags & INT_OP))
@@ -728,7 +728,7 @@
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
         if ((flags & INT_OP) && dst == arg2)
             return SLJIT_SUCCESS;
-        return push_inst(compiler, (ORR ^ (1 << 31)) | RD(dst) | RN(TMP_ZERO) | RM(arg2));
+        return push_inst(compiler, (ORR ^ W_OP) | RD(dst) | RN(TMP_ZERO) | RM(arg2));
     case SLJIT_MOV_S32:
         SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
         if ((flags & INT_OP) && dst == arg2)
@@ -1080,7 +1080,7 @@


 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op)
 {
-    sljit_ins inv_bits = (op & SLJIT_I32_OP) ? (1 << 31) : 0;
+    sljit_ins inv_bits = (op & SLJIT_I32_OP) ? W_OP : 0;


     CHECK_ERROR();
     CHECK(check_sljit_emit_op0(compiler, op));
@@ -1360,7 +1360,7 @@
     sljit_ins inv_bits = (op & SLJIT_F32_OP) ? (1 << 22) : 0;


     if (GET_OPCODE(op) == SLJIT_CONV_S32_FROM_F64)
-        inv_bits |= (1 << 31);
+        inv_bits |= W_OP;


     if (src & SLJIT_MEM) {
         emit_fop_mem(compiler, (op & SLJIT_F32_OP) ? INT_SIZE : WORD_SIZE, TMP_FREG1, src, srcw);
@@ -1382,7 +1382,7 @@
     sljit_ins inv_bits = (op & SLJIT_F32_OP) ? (1 << 22) : 0;


     if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32)
-        inv_bits |= (1 << 31);
+        inv_bits |= W_OP;


     if (src & SLJIT_MEM) {
         emit_op_mem(compiler, ((GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32) ? INT_SIZE : WORD_SIZE), TMP_REG1, src, srcw, TMP_REG1);
@@ -1662,7 +1662,7 @@
     sljit_s32 src, sljit_sw srcw)
 {
     struct sljit_jump *jump;
-    sljit_ins inv_bits = (type & SLJIT_I32_OP) ? (1 << 31) : 0;
+    sljit_ins inv_bits = (type & SLJIT_I32_OP) ? W_OP : 0;


     SLJIT_ASSERT((type & 0xff) == SLJIT_EQUAL || (type & 0xff) == SLJIT_NOT_EQUAL);
     ADJUST_LOCAL_OFFSET(src, srcw);
@@ -1787,7 +1787,7 @@
     sljit_s32 dst_reg,
     sljit_s32 src, sljit_sw srcw)
 {
-    sljit_ins inv_bits = (dst_reg & SLJIT_I32_OP) ? (1 << 31) : 0;
+    sljit_ins inv_bits = (dst_reg & SLJIT_I32_OP) ? W_OP : 0;
     sljit_ins cc;


     CHECK_ERROR();


Modified: code/trunk/src/sljit/sljitNativePPC_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativePPC_common.c    2018-12-14 16:10:57 UTC (rev 1056)
+++ code/trunk/src/sljit/sljitNativePPC_common.c    2019-01-03 09:34:42 UTC (rev 1057)
@@ -42,7 +42,7 @@
 #include <sys/cache.h>
 #endif


-#if (defined SLJIT_LITTLE_ENDIAN && SLJIT_LITTLE_ENDIAN)
+#if (defined _CALL_ELF && _CALL_ELF == 2)
#define SLJIT_PASS_ENTRY_ADDR_TO_CALL 1
#endif