[pcre-dev] [Bug 1861] New: [PATCH] ubsan reports various ali…

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Author: admin
Date:  
To: pcre-dev
Subject: [pcre-dev] [Bug 1861] New: [PATCH] ubsan reports various aligned stores in sljit
https://bugs.exim.org/show_bug.cgi?id=1861

            Bug ID: 1861
           Summary: [PATCH] ubsan reports various aligned stores in sljit
           Product: PCRE
           Version: 8.39
          Hardware: x86-64
                OS: All
            Status: NEW
          Severity: bug
          Priority: medium
         Component: Code
          Assignee: ph10@???
          Reporter: marc.mutz@???
                CC: pcre-dev@???


Created attachment 910
--> https://bugs.exim.org/attachment.cgi?id=910&action=edit
Qt patch

When running the Qt test suite under ubsan, the following errors were reported:

      pcre/sljit/sljitNativeX86_64.c:342:20: runtime error: store to misaligned
address 0x000000d403c6 for type 'sljit_s32', which requires 4 byte alignment
      pcre/sljit/sljitNativeX86_64.c:546:25: runtime error: store to misaligned
address 0x000000d40409 for type 'sljit_s32', which requires 4 byte alignment
      pcre/sljit/sljitNativeX86_64.c:519:27: runtime error: store to misaligned
address 0x000000d40422 for type 'sljit_s32', which requires 4 byte alignment
      pcre/sljit/sljitNativeX86_64.c:38:19: runtime error: store to misaligned
address 0x000000d404bb for type 'sljit_sw', which requires 8 byte alignment
      pcre/sljit/sljitNativeX86_common.c:537:29: runtime error: store to
misaligned address 0x2add1f42d082 for type 'sljit_s32', which requires 4 byte
alignment
      pcre/sljit/sljitNativeX86_common.c:545:29: runtime error: store to
misaligned address 0x2add1f42d23e for type 'sljit_s32', which requires 4 byte
alignment
      pcre/sljit/sljitNativeX86_64.c:222:21: runtime error: store to misaligned
address 0x000000d40615 for type 'sljit_s32', which requires 4 byte alignment
      pcre/sljit/sljitNativeX86_64.c:295:21: runtime error: store to misaligned
address 0x000000d4092a for type 'sljit_s32', which requires 4 byte alignment


The attached patch (taken from qtbase.git, use patch -p<n> to apply to an SVN
checkout) fixes these for the tests in the Qt test suite.

Giuseppe D'Angelo reports that it fixes all ubsan errors in the PCRE test
suite, too: http://pastebin.com/UagaK2As

Of course, we were both testing on AMD64, so the other archs presumably still
have the same problem.

>From the commit message:


    Fix [UBs] by providing new sljit_unaligned_store_<type> functions,
    which allow for an automated conversion from the old code to
    the new.


    This patch fixes only those that ubsan complained about during
    a run of Qt's tst_qregularexpression. The broken pattern is
    used almost ubiquitously in the code, though, so these fixes
    should probably be applied everywhere, too.


    Background: when programming in C/C++, you are not programming
    an x86 processor. The compiler is. What you're programming
    against is the C/C++ abstract machine. And in that machine,
    the store of an int to a misaligned address is undefined
    behavior, which allows the compiler to assume it cannot happen,
    and optimize accordingly. The memcpy variant should generate
    the exact same code on platforms that support unaligned stores,
    but, crucially, the decision is now made by the compiler,
    fixing the UB.


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