Revision: 508
http://www.exim.org/viewvc/pcre2?view=rev&revision=508
Author: zherczeg
Date: 2016-04-06 08:18:42 +0100 (Wed, 06 Apr 2016)
Log Message:
-----------
Support Android ARM64 cacheflush in JIT. Patch by Tavian Barnes.
Modified Paths:
--------------
code/trunk/src/sljit/sljitConfigInternal.h
code/trunk/src/sljit/sljitNativePPC_common.c
code/trunk/src/sljit/sljitNativeSPARC_common.c
Modified: code/trunk/src/sljit/sljitConfigInternal.h
===================================================================
--- code/trunk/src/sljit/sljitConfigInternal.h 2016-04-01 15:52:08 UTC (rev 507)
+++ code/trunk/src/sljit/sljitConfigInternal.h 2016-04-06 07:18:42 UTC (rev 508)
@@ -279,6 +279,15 @@
/* Instruction cache flush. */
/****************************/
+#if (!defined SLJIT_CACHE_FLUSH && defined __has_builtin)
+#if __has_builtin(__builtin___clear_cache)
+
+#define SLJIT_CACHE_FLUSH(from, to) \
+ __builtin___clear_cache((char*)from, (char*)to)
+
+#endif /* __has_builtin(__builtin___clear_cache) */
+#endif /* (!defined SLJIT_CACHE_FLUSH && defined __has_builtin) */
+
#ifndef SLJIT_CACHE_FLUSH
#if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86)
@@ -295,6 +304,11 @@
#define SLJIT_CACHE_FLUSH(from, to) \
sys_icache_invalidate((char*)(from), (char*)(to) - (char*)(from))
+#elif (defined(__GNUC__) && (__GNUC__ >= 5 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)))
+
+#define SLJIT_CACHE_FLUSH(from, to) \
+ __builtin___clear_cache((char*)from, (char*)to)
+
#elif defined __ANDROID__
/* Android lacks __clear_cache; instead, cacheflush should be used. */
@@ -307,6 +321,7 @@
/* The __clear_cache() implementation of GCC is a dummy function on PowerPC. */
#define SLJIT_CACHE_FLUSH(from, to) \
ppc_cache_flush((from), (to))
+#define SLJIT_CACHE_FLUSH_OWN_IMPL 1
#elif (defined SLJIT_CONFIG_SPARC_32 && SLJIT_CONFIG_SPARC_32)
@@ -313,6 +328,7 @@
/* The __clear_cache() implementation of GCC is a dummy function on Sparc. */
#define SLJIT_CACHE_FLUSH(from, to) \
sparc_cache_flush((from), (to))
+#define SLJIT_CACHE_FLUSH_OWN_IMPL 1
#else
Modified: code/trunk/src/sljit/sljitNativePPC_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativePPC_common.c 2016-04-01 15:52:08 UTC (rev 507)
+++ code/trunk/src/sljit/sljitNativePPC_common.c 2016-04-06 07:18:42 UTC (rev 508)
@@ -46,6 +46,8 @@
#define SLJIT_PASS_ENTRY_ADDR_TO_CALL 1
#endif
+#if (defined SLJIT_CACHE_FLUSH_OWN_IMPL && SLJIT_CACHE_FLUSH_OWN_IMPL)
+
static void ppc_cache_flush(sljit_ins *from, sljit_ins *to)
{
#ifdef _AIX
@@ -87,6 +89,8 @@
#endif /* _AIX */
}
+#endif /* (defined SLJIT_CACHE_FLUSH_OWN_IMPL && SLJIT_CACHE_FLUSH_OWN_IMPL) */
+
#define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
#define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
#define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
Modified: code/trunk/src/sljit/sljitNativeSPARC_common.c
===================================================================
--- code/trunk/src/sljit/sljitNativeSPARC_common.c 2016-04-01 15:52:08 UTC (rev 507)
+++ code/trunk/src/sljit/sljitNativeSPARC_common.c 2016-04-06 07:18:42 UTC (rev 508)
@@ -33,6 +33,8 @@
Both for sparc-32 and sparc-64 */
typedef sljit_u32 sljit_ins;
+#if (defined SLJIT_CACHE_FLUSH_OWN_IMPL && SLJIT_CACHE_FLUSH_OWN_IMPL)
+
static void sparc_cache_flush(sljit_ins *from, sljit_ins *to)
{
#if defined(__SUNPRO_C) && __SUNPRO_C < 0x590
@@ -82,6 +84,8 @@
#endif
}
+#endif /* (defined SLJIT_CACHE_FLUSH_OWN_IMPL && SLJIT_CACHE_FLUSH_OWN_IMPL) */
+
/* TMP_REG2 is not used by getput_arg */
#define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
#define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)