Zoltan, thanks very much !
Jiong - sent from phone
On Jun 6, 2013 7:57 PM, "Zoltan Herczeg" <hzmester@???> wrote:
> Hi,
>
> yes, you are right again. If sljit_is_fpu_available() returns with zero,
> floating point operations are not available.
>
> Regards,
> Zoltan
>
> PS: I will not be available in the rest of the week, so I can only answer
> further questions on Monday.
>
> "WANG.Jiong" <wong.kwongyuan@???> írta:
> >Zoltan,>
> >
> thanks very much!>
> >
> the other question is:>
> >
> looks like float type is not necessary in JIT ? those XXX_fop is >
> not used ?>
> >
> --->
> Jiong>
> >
> on 2013/6/6 18:41, Zoltan Herczeg wrote:>
> > Hi,>
> >>
> > yes, your guess is right in both cases.>
> >>
> > On mips:>
> > 1 - for saving the return register>
> > 4 - excerpt form the MIPS ABI: In a non-leaf function the maximum number>
> > of bytes of arguments used to call other functions from the non-leaf>
> > function must be allocated. However, at least four words (16 bytes) must>
> > always be reserved, even if the maximum number of arguments to any
> called>
> > function is fewer than four words.>
> > In SLJIT we can pass maximum of 3, machine word sized arguments to a>
> > function.>
> >>
> > ARM has much less scratch registers than MIPS, and sometimes we need to>
> > use saved registers for scratch.>
> >>
> > Btw the JIT compiler has a separate repository, where additional test>
> > cases are available:>
> > http://sourceforge.net/projects/sljit/>
> >>
> > Regards,>
> > Zoltan>
> >>
> > "WANG.Jiong" <wong.kwongyuan@???> írta:>
> >> Hi All,>>
> >>>
> > I am trying to port PCRE to a VLIW processor and I am studing MIPS>>
> > backend to warm up with the code.>>
> > But the following things confused me:>>
> >>>
> > in sljit/sljitNativeMIPS_common.c:>>
> > 475 local_size += (saveds + 1 + 4) * sizeof(sljit_sw);>>
> > how does the "saveds + 1 + 4" comes ? I guess "1" means the extra
> return>>
> > address register, but what does "4" mean? the shadown area on mips stack
> ?>>
> > and I found ARM backend will push the last two scratch registers on>>
> > stack, while mips don't, could anyone give me some hint on this? just>>
> > because ARM don't have enough caller saved registers to be used as>>
> > scratch register?>>
> > thanks in advance !>>
> > --->>
> > Regards,>>
> > Jiong>>
> > -- >>
> > ## List details at https://lists.exim.org/mailman/listinfo/pcre-dev >>
> >>
> >>
> >
>
>
>
