[pcre-dev] Question about sljit_emit_enter

Hi All,

I am trying to port PCRE to a VLIW processor and I am studing MIPS
backend to warm up with the code.

But the following things confused me:


in sljit/sljitNativeMIPS_common.c:

475 local_size += (saveds + 1 + 4) * sizeof(sljit_sw);

how does the "saveds + 1 + 4" comes ? I guess "1" means the extra return
address register, but what does "4" mean? the shadown area on mips stack ?

and I found ARM backend will push the last two scratch registers on
stack, while mips don't, could anyone give me some hint on this? just
because ARM don't have enough caller saved registers to be used as
scratch register?

thanks in advance !

---
Regards,
Jiong