[Pcre-svn] [742] code/trunk: Fix cache-flush issue on PowerP…

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Autor: Subversion repository
Datum:  
To: pcre-svn
Betreff: [Pcre-svn] [742] code/trunk: Fix cache-flush issue on PowerPC, adding some comments and a check for disabled PCRE_EXTRA_TABLES.
Revision: 742
          http://vcs.pcre.org/viewvc?view=rev&revision=742
Author:   zherczeg
Date:     2011-11-06 08:05:33 +0000 (Sun, 06 Nov 2011)


Log Message:
-----------
Fix cache-flush issue on PowerPC, adding some comments and a check for disabled PCRE_EXTRA_TABLES.

Modified Paths:
--------------
    code/trunk/ChangeLog
    code/trunk/pcre_exec.c
    code/trunk/sljit/sljitConfigInternal.h
    code/trunk/sljit/sljitLir.h
    code/trunk/sljit/sljitNativePPC_common.c


Modified: code/trunk/ChangeLog
===================================================================
--- code/trunk/ChangeLog    2011-10-31 09:31:46 UTC (rev 741)
+++ code/trunk/ChangeLog    2011-11-06 08:05:33 UTC (rev 742)
@@ -9,7 +9,11 @@
 2.  JIT compiler now supports OP_NCREF, OP_RREF and OP_NRREF. New test cases
     are added as well.


+3.  Fix cache-flush issue on PowerPC (It is still an experimental JIT port).
+    PCRE_EXTRA_TABLES is not suported by JIT, and should be checked before
+    calling _pcre_jit_exec. Some extra comments are added.


+
Version 8.20 21-Oct-2011
------------------------


Modified: code/trunk/pcre_exec.c
===================================================================
--- code/trunk/pcre_exec.c    2011-10-31 09:31:46 UTC (rev 741)
+++ code/trunk/pcre_exec.c    2011-11-06 08:05:33 UTC (rev 742)
@@ -6011,6 +6011,7 @@
 if (extra_data != NULL
     && (extra_data->flags & PCRE_EXTRA_EXECUTABLE_JIT) != 0
     && extra_data->executable_jit != NULL
+    && (extra_data->flags & PCRE_EXTRA_TABLES) == 0
     && (options & ~(PCRE_NO_UTF8_CHECK | PCRE_NOTBOL | PCRE_NOTEOL |
                     PCRE_NOTEMPTY | PCRE_NOTEMPTY_ATSTART)) == 0)
   return _pcre_jit_exec(re, extra_data->executable_jit, subject, length,


Modified: code/trunk/sljit/sljitConfigInternal.h
===================================================================
--- code/trunk/sljit/sljitConfigInternal.h    2011-10-31 09:31:46 UTC (rev 741)
+++ code/trunk/sljit/sljitConfigInternal.h    2011-11-06 08:05:33 UTC (rev 742)
@@ -178,13 +178,23 @@


#ifndef SLJIT_CACHE_FLUSH

-#if !(defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) && !(defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
-    /* Just call __ARM_NR_cacheflush on Linux. */
+#if (defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) || (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
+
+/* The __clear_cache() implementation of GCC is a dummy function on PowerPC. */
 #define SLJIT_CACHE_FLUSH(from, to) \
+    ppc_cache_flush((from), (to))
+
+#elif (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) || (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
+
+/* Not required to implement on archs with unified caches. */
+#define SLJIT_CACHE_FLUSH(from, to)
+
+#else
+
+/* Calls __ARM_NR_cacheflush on ARM-Linux. */
+#define SLJIT_CACHE_FLUSH(from, to) \
     __clear_cache((char*)(from), (char*)(to))
-#else
-    /* Not required to implement on archs with unified caches. */
-#define SLJIT_CACHE_FLUSH(from, to)
+
 #endif


#endif /* !SLJIT_CACHE_FLUSH */

Modified: code/trunk/sljit/sljitLir.h
===================================================================
--- code/trunk/sljit/sljitLir.h    2011-10-31 09:31:46 UTC (rev 741)
+++ code/trunk/sljit/sljitLir.h    2011-11-06 08:05:33 UTC (rev 742)
@@ -56,6 +56,9 @@
         - mainly position independent code
       - Optimizations (perhaps later)
         - Only for basic blocks (when no labels inserted between LIR instructions)
+
+    For valgrind users:
+      - pass --smc-check=all argument to valgrind, since JIT is a "self-modifying code"
 */


#if !(defined SLJIT_NO_DEFAULT_CONFIG && SLJIT_NO_DEFAULT_CONFIG)
@@ -87,6 +90,7 @@

 #define SLJIT_UNUSED        0


+/* Temporary (scratch) registers may not preserve their values across function calls. */
 #define SLJIT_TEMPORARY_REG1    1
 #define SLJIT_TEMPORARY_REG2    2
 #define SLJIT_TEMPORARY_REG3    3
@@ -95,6 +99,7 @@
 #define SLJIT_TEMPORARY_EREG1    4
 #define SLJIT_TEMPORARY_EREG2    5


+/* General (saved) registers preserve their values across function calls. */
 #define SLJIT_GENERAL_REG1    6
 #define SLJIT_GENERAL_REG2    7
 #define SLJIT_GENERAL_REG3    8


Modified: code/trunk/sljit/sljitNativePPC_common.c
===================================================================
--- code/trunk/sljit/sljitNativePPC_common.c    2011-10-31 09:31:46 UTC (rev 741)
+++ code/trunk/sljit/sljitNativePPC_common.c    2011-11-06 08:05:33 UTC (rev 742)
@@ -37,6 +37,18 @@
    Both for ppc-32 and ppc-64. */
 typedef sljit_ui sljit_ins;


+static void ppc_cache_flush(sljit_ins *from, sljit_ins *to)
+{
+    while (from < to) {
+#ifdef __GNUC__
+        asm volatile ( "icbi 0, %0" : : "r"(from) );
+#else
+#error "Must implement icbi"
+#endif
+        from++;
+    }
+}
+
 #define TMP_REG1    (SLJIT_NO_REGISTERS + 1)
 #define TMP_REG2    (SLJIT_NO_REGISTERS + 2)
 #define TMP_REG3    (SLJIT_NO_REGISTERS + 3)